Reza Kourdy and Mohammad Reza Nouri rad
Network-on-Chip (NoC) has emerged as a very promising paradigm for designing scalable communication architecture for Systems on Chips (SoCs). This paper proposes a general framework for the design and simulation of networkon- chip-based pyramid architectures such as Fat-Pyramid-NOC and Fat-Stack-NOC. Several parameters in the design space are investigated, namely, network topology, parallelism degree, and the Scalability. Emulation is necessary to evaluate and validate the performance of the NoC system.
Keywords: Network-on-Chip (NoC), Systems on Chip (SoC), Field-Programmable Gate Array (FPGA), processing element (PE).
Reza Kourdy and Mohammad Reza Nouri rad
The Network-on-Chip (NoC) interconnect network of future multi-processor system-on-a-chip (MPSoC) needs to be efficient in terms of energy and delay.Most network-on-chip (NoC) architectures are based on a mesh-based interconnection structure. In this paper, we present a new NoC architecture, which relies on source synchronous data transfer. We also carry out the high-level simulation of on chip network using NS-2 to verify the analytical analysis.
Keywords: Mesh of Tree(MT), Network on chip (NoC), MPSOC, System-On-Chip (SoC)
Mohammad Reza Nouri Rad and Reza Kourdy
This paper was focused on study Transport Control Protocol (TCP) and User Datagram Protocol (UDP) performance in network on chip (NoC). We investigate the performance of TCP and UDP in term of bandwidth usage for increases throughput in network on chip (NoC), using simulation tool NS-2. Also two types of traffic (FTP and CBR) used during the simulation course in Mesh NoC architecture, and we used TCP’s types (New Reno, and Vegas) which we used in our experiments.
Keywords: Network-on-Chip, UDP, TCP New Reno, TCP Vegas
Bhavya Alankar and B K Kanaujia
Reconfigurable Computing devices are coming very strongly in the digital hardware systems due to the availability of ready to use resources, parallel logic operations and reconfigurable designs. The usage of Reconfigurable systems in real time do-main is also a very fruitful proposition as the FPGA devices are coming with processing cores for Real Time data processing. This paper mainly focuses on the application of Reconfigurable Computing systems in the data sharing domain and in order to depict this application we have designed and simulated a priority based data sharing architecture through which we can interface two Proces-sors, which in turn can intercommunicate with each other. The main advantage of this architecture is that it is highly compact, easy to use and designed using a modular approach so that it could be easily implemented on Reconfigurable hardware. All the different modules along with the complete architecture is simulated using modelsim 6.0 and synthesized using Xilinx 7.1(iSE).
Keywords: Reconfigurable Computing, FPGA, Master-Slave processor
Alti Adel, Boukerram Abdallah and RoosePhilippe
This paper presents the tool SELETOR which has been developed for services selection. This paper proposes also a new web management system that allows for considering quality and context-awareness while discovering and selecting web service. The main idea of the proposed web service oriented architecture consists in the ontology Context-aware Quality Semantic Web Service called (CxQWS). At the first step, services are defined as a set of semantic metadata, reflecting service requirements and QoS parameters. At the second step, services with a semantic contextual metadata are elaborated. Such a procedure ensures that the selection decisions should be based on the semantic quality representation of the created services. The tourism services in a mobile environment have a critical role in creating tourist satisfaction. They are neither a uniform group, nor able to give consistently high service quality. Indeed they have significantly different platforms and a variety of heterogeneous service providers which make the management of service qualities complex. This complexity is clearly noticeable when a given service is provided by two or more providers, within the same area of the mobile clients; a decision should be made to select the most appropriate service based on contextual description with the best QoS.
Keywords: context-aware, selection of services, quality of service, context matching
Setiawan Assegaff, Ab Razak Che Hussin and Halina Mohamed Dahlan
This study contributes to enrich our understanding of knowledge workers’ behavior in continuing knowledge sharing through Knowledge Management System (KMS). We extended Xu and Quaddus post-adoption model by proposing a new perspective on how to understand knowledge workers’ behavior by considering different belief and expectation of them. Existing KMS adoption have not thoroughly explored the different belief and expectation of knowledge workers in knowledge sharing (KS). Most of previous model provides limited information in understanding of how the knowledge worker sharing their knowledge through KMS. This study will provide a model to understand knowledge workers’ behavior in sharing their knowledge through KMS.
Keywords: Knowledge Management, Knowledge Management System, Knowledge Worker, KMS Adoption
Mohamed Ettaouil, Khalid Haddouch and Chakir Loqman
In this paper, we propose a new approach to solve the binary CSP problem using two methods, a quadratic programming (QP) and genetic algorithms (GA). This approach is divided into two steps: The first step involves filtering and modeling the constraint satisfaction problem as 0-1 quadratic programming subject to linear constraints. The second step concerns applying the genetic algorithms to solve the QP problem. Therefore, the proposed algorithm based on the genetic algorithms and the model of CSP problem is well detailed. We show that the process of resolution is explained by an example of application. Finally, some computational experiments solving the CSP problem are shown.
Keywords: Constraint satisfaction problem; Consisstancy techniques, Quadratic 0-1 programming; Genetic algorithms
Reza Kourdy and Mohammad Reza Nouri rad
In recent years, researchers have proposed a wide variety of topologies for data-center networks, all with the goal of providing high bisection bandwidth at low cost. In this paper we focus on HyperX topology because it is considered attractive for high bisection bandwidth data-center networks.For large-scale networks, high-radix switches reduce hop and switch count, which decreases latency and power. Silicon nanophotonic technology provides a long-term solution to this problem. We also carry out the high-level simulation of on chip network using NS-2 to verify the analytical analysis.
Keywords: HyperX, Network on chip (NoC), Multi-Processor-System-On-Chip (MpSoC)
Reza Kourdy and Mohammad Reza Nouri rad
Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated wires to achieve high performance and modularity. Network Topology is one of the most important concerns in NoC architecture design. The choice of network topology is important in designing a high-performance NoC. In this paper, we survey the simulation of the RTCCPyramid to be used as the Scalable and Regular topology in NoC. The Recursive Transpose-Connected Cycles (RTCC) is a new modular topology for interconnection networks. The RTCC has a recursive definition quite similar to that of fractal graphs having interesting topological characteristics, making it suitable for utilization as the base topology of large-scale multicomputer interconnection networks. The RTCC is superior to conventional topologies such as the mesh and k-ary n-cube.
Keywords: RTCC-Pyramid, Network-on-Chip(NoC), Recursive Transpose-Connected Cycles(RTCC), System-on- Chip(SoC), WK-Recursive
Reza Kourdy and Mohammad Reza Nouri rad
The choice of network topology is important in designing an Efficient NoC. Different NoC topologies can dramatically affect the network characteristics, such as fault-tolerant, wire length, hop count and communication load. These characteristics in turn determine the efficiency of NoC architectures. The Torus-pyramid-NOC is a generalized pyramid network based on a general Grid structure. Such pyramid networks form a wide class of interconnection networks that possess rich topological properties. In this paper, we simulate a general class of pyramid networks that are based on grid connections between the nodes in each level and is suitable for multiprocessor networks such as NOCs.
Keywords: RTCC-Pyramid, Network-on-Chip (NoC), Recursive Transpose-Connected Cycles (RTCC), System-on-Chip (SoC), WK-Recursive
Mohammad Reza Nouri Rad and Reza Kourdy
In MPLS-NoC data transmission occurs on label switching path (LSPs). LSPs established either before data transmission that called control driven, or on detection of a certain flow of data that called data driven. In this paper we compare the performance of heterogeneous Network on Chip (NoC) architectures in the sense of on chip network design methodology, with Layer 3 packet forwarding. We also carry out the high-level simulation of on chip network using NS-2 to verify the analytical analysis.
Keywords: Network-on-Chip, MPLS, Layyer 3 packet forwarding, control driven, data driven
Mohammad Reza Nouri Rad and Reza Kourdy
TCP might underutilize the link and degrade the reliability. TCP uses the acknowledgments (ACKs) to adjust the sending rate. In this paper relies on the fact that TCP uses ACKs to determine its traffic sending to the network. In this paper we analyze and compare the bandwidth utilized of UDP with TCP/IP protocols, namely: Fack, Reno, and Sack with ACKs and Delay ACKs, that adept in network on chip (NoC). We simulate Mesh NoC architecture with Network Simulator 2 (NS2). The simulation results reveal the applicability of UDP protocol in bandwidth usage of proposed architecture.
Keywords: Network-on-Chip, UDP, TCP protocols, Delay ACKs
A. Benjamin Joseph and R. Baskaran
Edges constitute the high frequency components of an image. This work proposes a novel approach for still image compression using edge based in painting technique and wavelet transform to preserve the high frequency components. The main objective of the proposed work is to elevate the PSNR without compromising the compression ratio. Edge based in painting technique is used to enhance the PSNR. In painting technique used in the proposed work traces the high frequency information which is lost during transmission using edge information transmitted. At the encoder the image is decomposed using wavelet transform, which reduces the blocking artifacts and then coded using EZW coder. Edge information is extracted using canny edge detector which outperforms the traditional detectors and then coded using entropy coding. At the decoder using edge based in painting technique, the image is reconstructed with less mean square error. The results show that proposed compression technique outperforms the existing technique in terms of PSNR and compression ratio.
Keywords: Image Compression, Wavelet Transform, Edges, Feature Extraction, Image InPainting, Entropy Encoding, EZW Coding
Ghaith Makey, Kanj Al-Shufi and Mustafa Sayem El-Daher
With the advent of modern GPGPUs which can be used efficiently in general purpose applications, the use of multithreaded cores and high memory bandwidths of CUDA-enabled GPGPUs in digital image processing and features extraction has been raised to a new level. This paper uses NVIDIA’s CUDA language to calculate polar Hough transform for lines which is an important method for image features extraction; a performance study of this implementation and a comparison with CPU sequential computations is included. This study has been processed on GPGPU which is inexpensive and available for all the research laboratories in the developing countries.
Keywords: Image feature extraction, Parallel computing, Graphics processors, Performance Analysis
Souad El houssaini and Abdelmajid Badri
This paper presents an integrated framework of Geographic Information System (GIS) and a Relational Database Management System (RDBMS) equipped with interactive communication capabilities. The model integrates the design of the database and the management of implementation of the monitoring system which includes the operations of query and analysis using the web and desktop applications. This study aims to apply techniques of analysis of the road network in a GIS to collect geographic data on the monitoring station and the roads. The information on road infrastructure is not only useful for locating monitoring stations, but it is also important to guide a station to follow the shortest path to achieve the objectives of management and routing. Optimal routes based on the minimum cost are identified using Dijkstra’s algorithm. Graphical User Interfaces (GUI) were developed to visualize the information collected on the model entities, and also to provide synthesis operations based on graphs using data tables and objects in the map. The proposed system should be an effective and intelligent tool for a rapid intervention and to improve the monitoring of the road network which can eventually be extended to a national infrastructure of GIS. Simulated test cases have been carried out for network of Mohammedia City in Morocco.
Keywords: GIS, Location, Routing, Road network, Monitoring, Dijkstra’s algorithm
Mohammad Reza Nouri Rad and Reza Kourdy
This paper presents some experiences with Class of Service (CoS) translation in networks-on-Chip. Multi Protocol Label Switching(MPLS) provides the flexibility of being able to Forwarding Equivalence Classes and the ability to create a forwarding hierarchy via label stacking. All of these techniques facilitate the operation of Quality of Service. Through MPLS-TE (Traffics Engineering) functions such as network resources optimization, strict Quality of Service voice data delivery, and fast recovery on link or node failures can ensured. We simulate Butterfly NoC architecture with Network Simulator 2 (NS2). The simulation results reveal the applicability of the proposed architecture, which can support classes of services with simplicity of internetwork connection of Butterfly architecture.
Keywords: Network-on-Chip, MultiProtocol Label Switching, Quality-of-Service , claccess of services
Mohammad Reza Nouri Rad and Reza Kourdy
Denial-of-Service (DoS) vulnerability on a different topology, such as embedded mesh, or network-on-chip in future many core processors, would be worth researching. Due to distributed arbitration nature of mesh architecture, the bandwidth of the mesh NoC would be more vulnerable to the attack. Network-on-chip, where a large number of buffers are used in cores and routers, is also more susceptible to DoS attacks. In this paper, we illustrate our solution for helping detect attacks aiming at retrieving sensitive information from the system or at causing Denial-of-Service (DoS) with pre processor elements in network interface of NoC.
Keywords: Network-on-Chip, Denial-of-Service, Security, Reconfigurable
Reza Kourdy and Mohammad Reza Nouri rad
Most network-on-chip (NoC) architectures are based on a mesh-based interconnection structure. In this paper, we present a new NoC architecture, which relies on source synchronous data transfer. We consider variations in Pyramid architectures that can lead to higher performance or greater cost-effectiveness in certain applications. For large-scale networks, our topology reduces hop and switch count, which decreases latency and power. We also carry out the high-level simulation of on chip network using NS-2 to verify the analytical analysis.
Keywords: Pyramid, Network on chip (NoC), System-On-Chip (SoC), Chip-level multiprocessors (CMPs), quality-ofservice( QOS)
Apeksha Garg, Harshit Lahoti, Jyotsana Choubey and Rashid Sheikh
Secure multiparty computation (SMC) is a subfield of cryptography. The goal of SMC is to enable parties to jointly compute a function of their inputs while keeping these inputs private. It allows parties to know the result of cooperative computation while preserving privacy of individual data. Secure sum computation is an important application of SMC. In all the proposed protocols parties are allowed to compute the sum while keeping their individual data secret with increased computation complexity for hacking individual data. The Secure Sum Protocols are simulated using .NET Framework 4.0 using c#. We get communication and computation complexities. We show the comparative probabilities of data leakage for these protocols. In this paper, we have simulated secure sum protocols proposed by Sheikh et al. and Clifton et al.
Keywords: Computation Complexity, Privacy, Secure Multiparty Computation, Simulation
A. Deva Prasad and Deepesh Kumar Srivastava
Visual cryptography technique allows the visual information to be encrypted in such a way that their decryption can be performed by human visual system. This technique used to encrypt an image into shares such that stacking a sufficient number of shares reveals the secret images. In visual cryptography there are different technique like sub pixel, error diffusion, Boolean operation etc. Here we are proposing a new enhancement to the existing techniques where the image encryption of color images is carried out in a step-by-step process of converting color image into bitmap and vice-versa. In this research compilation, we propose a new way of performing color visual cryptography using wavelet technique. Wavelet technique is used to convert the Color Image to Gray Image. Here user can give desired image as input to encrypt and transfer those generated shares to intended receiver, where decryption doesn’t need any computation process.
Keywords: Image Encryption, Visual Cryptography, Error diffusion, Digital halftoning, Wavelets
Salah-ddine Krit, Jalal Laassiri and Said El Hajji
This paper targets heterogeneous low power communication circuits and Systems that will be used in the future generations’hand- held devices (PDA’s, mobile phones). Those platforms will probably contain a few studies have emerged and considerable amount of on-chip memories. An optimized communication architecture will be required to interconnect them efficiently. Many communication architectures have been proposed in the literature: shared buses, bridged buses, segmented buses and more recently, Networks-on-Chip. Being battery-powered devices, the energy consumption of the platform is a critical issue. However, with the exception of buses, power consumption has been mostly neglected in interconnection networks. Only very recently have a few studies emerged in that domain. The Power Aware Wireless Sensors (PAWiS) simulation framework becomes an essential tool to evaluate design models of Wireless Sensor Networks (WSNs) including Soft-Ware (SW) and Hard-Ware (HW) platforms. PAWiS is an OMNeT++ based discrete event simulator written in C++. It captures the node internals (modules) as well as the node surroundings (network, environment) and provides specific features critical to WSNs like capturing power consumption at various levels of granularity, support for mobility, and environmental dynamics as well as the simulation of timing effects. The design of integrated low-power wireless sensor nodes involves the convergence of many technologies and disciplines. Submicron complementary metal oxide semiconductor (CMOS) devices, micro-electro-mechanical system filters, on and off chip electromagnetic elements, sensors and dc-dc converters are some of the technologies that will enable pervasive systems such as wireless sensor networks. High system complexity requires the use of many simulation environments during design: algorithm simulators, behavioural and transistorlevel circuit simulators, electromagnetic (EM) simulators and network simulators. It is shown that highly integrated, selfcontained systems require multiple-domain simulations to uncover complex interactions between domains. In this paper we present a flexible and extensible simulation framework to estimate power consumption of sensor network applications for arbitrary HW platforms. Specific examples of block and system level design methodologies used in low-power wireless systems are presented here.
Keywords: Power Aware Wireless Sensors, Wireless Sensor Networks, Soft-Ware, Hard-Ware, power consumption, low-power wireless systems
Ashwin A. Shinde and Maneesh Shrivastava
Manual survey of crop estimation takes a lot of time and are often misprice and unreliable. Crop monitoring using remote sensing (RS) enables timely, economical, reliable, and the most important comprehensive and accurate crop Identification. The aim of this research is to evaluate crop discrimination using satellite image data by following remote sensing approach. This paper illustrates the use of Local Binary Pattern Variance on satellite images to classify the land in to crop land and non-crop land and to classify different crops. The input image is enhanced first then Local Binary Pattern Variance is used to extract features from the crop images specifically extracting green colors. After identifying the LBPV pattern of each pixel (i,j) in the given image the whole texture image is represented by building a histogram showing intensity values for uniform and non uniform patterns. A texture image database of different crops is created. The texture features of the input image are then compared with texture features obtained from the image database of different crops and the different types of crops are identified.
Keywords: Remote Sensing, Image Enhancing, LBPV, Histogram, Crop Identification, Crop Classification
Mohammad Reza Nouri Rad and Reza Kourdy
In this paper we analyze and compare the UDP and different congestion control and avoidance mechanisms which proposed for TCP/IP protocols, namely: Fack, Reno, and Sack, that adept in network on chip (NoC). We simulate Mesh NoC architecture with Network Simulator 2 (NS2). The simulation results reveal the applicability of UDP protocol in bandwidth usage of proposed architecture.
Keywords: Network-on-Chip, UDP, TCP Fack, TCP Reno, TCP Sack
Reza Kourdy and Mohammad Reza Nouri rad
Network on Chip (NoC) has been proposed as a new paradigm for designing System on Chip which supports high degree of scalability and reusability. NoC, specific parameters such as hardware architecture, topology, switching methods have a huge impact on performance and the cost of the NoCs. Since the ability of the network to be efficiently, disseminate information depends largely on the topology, we especially focus on simulation of the wk-recursive topology for NoC in different Sizes and dimensions for NoC. We simulate this topology for general-purpose parallel processing applications. This paper shows that a novel network called the NOC-WK-recursive is universally efficient when adequate capacity distribution is provided and is suitable for use as an interconnection network in parallel computers. The NOC-WK-recursive resembles the fat-tree and the fat-pyramid in hardware structure, but it has its unique strengths.
Keywords: Network on Chip (NoC), NOC-WK-recursive, hyper-mesh, hyper-tree, Fat-tree, Fat-pyramid, Fat-stack, augmented fat-stack (AFS)
Erfan AghaKArim Alamdar, Reza Kourdy and Mohammad Reza Nouri rad
The novel lath is convenient for those walking robots in which the power consumption is critical .The continuous decrease in CMOS technology feature size increases the susceptibility of such circuits to single event upsets (SEU) caused by the impact of particle strikes on system flip flops. This paper presents a novel SEU-tolerant latch in which redundant feedback lines are used to mask the effects of SEUs. The power dissipating, area, reliability, and propagation delay of the proposed SEU-tolerant latch are analyzed by SPICE simulator. The simulation results show that this latch consumes about 25% less power and occupy 29% less area than a TMR -latch. However, the reliability and the propagation delay of the proposed latch are still the same as the TMR-latch .The paper also compares the reliability of the new latch with that of the three documented SEU latches.
Keywords: SEU, Reliability, Fault tolerance, Latency
Asima Nisar
Green behavior into homes comprises of environmental sustainability, energy conservation, efficient residential resource consumption management, etc. This technical note provides an overview of the Green Home concept, Green Building essentials with its Environmental, Economic, Social benefits and lastly the Greening requirements.
Keywords: Green Home, Green Building, Eco-friendly Material
V. Upendran and R. Dhanapal
Secured communication in ad hoc wireless networks is primarily important, because the communication signals are openly available as they propagate through air and are more susceptible to attacks ranging from passive eavesdropping to active interfering. The lack of any central coordination and shared wireless medium makes them more vulnerable to attacks than wired networks. Nodes act both as hosts and routers and are interconnected by Multi- hop communication path for forwarding and receiving packets to/from other nodes. The objective of this paper is to propose a key exchange and encryption mechanism that aims to use the MAC address as an additional parameter as the message specific key[to encrypt]and forward data among the nodes. The nodes are organized in spanning tree fashion, as they avoid forming cycles and exchange of key occurs only with authenticated neighbors in ad hoc networks, where nodes join or leave the network dynamically.
Keywords: Ad hoc networks, Spanning tree, Neighborhood key, Message specific key
A. Sohail Ghasemi and A. M. Rahmani
In mobile environment, often users disconnect with network because limitation in battery power of mobile devices. In addition wireless lines bandwidth are rather less than wired lines and unstable wireless channel cause network congestion and lost the packets. Therefore data cache has use by the side of host mobile has used to reduce the competition wireless bandwidth and query as far as possible had answered local and as a result query latency increase to the least. Since cache memory is limited and it is impossible to caching all the data items, so data caching is limited. If limited disk memory is full and confront by new request that there wasn’t in cache, should unessential data remove from cache and replace the wanted data. This way of choosing data for remove is called replacement policy. this research by study different cache management methods in mobile computing and by finding decreases of method previous replacement, accessed to optimized methods in replacement cache and a new Cache Replacement policy Based on Neighbor nodes’ Condition in mobile environments is presented in that data cache of neighbor node is as a effective criterion in replacement and to inside data of determined cache that also in neighbor node cache is exist, allocate a priority for removing from cache. At the end by simulate the proposed model, this result is obtain that neighbor hit rate of proposed algorithm rather to classic algorithm is increased until response time query is reduced.
Keywords: Mobile Computing, Mobile Database, Data Management, Cache replacement, location-dependent information and neighbor node
Mohammad Reza Nouri Rad and Reza Kourdy
Through MPLS-TE (Traffics Engineering) functions such as network resources optimization, strict Quality of Service, voice data delivery, and fast recovery on link or node failures can ensured. We compare the performance of heterogeneous Network on Chip (NoC) architectures in the sense of on chip network design methodology, with IP and MPLS bandwidth reservation. We also carry out the high-level simulation of on chip network using NS-2 to verify the analytical analysis.
Keywords: Network-on-Chip, MultiProtocol Label Switching, Quality-of-Service , bandwidth reservation
Nadeem Akhtar, Yann Le Guyadec and Flavio Oquendo
One of the most challenging tasks in specification engineering for a multi-agent robotic system is to formally specify and architect the system, especially as a multi-agent robotic system is concurrent having concurrent processing, and often having dynamic environment. The formal requirement and architecture specifications along with step-wise refinement from abstract to concrete concepts play major role in formalizing the system. This paper proposes the formal requirement and architecture specifications aspects of an approach that supports analysis with respect to functional as well as non-functional properties by step-wise refinement from abstract to concrete specifications and formal architecture definition. These formal specifications have been exemplified by a case study. As formal specification techniques are getting more mature, our capability to build a correct complex multi-agent robotic system also grows quickly.
Keywords: Formal architecture, Multi-agent robotic system, ADL (Architecture Description Language)
Bouguerne Imen and Tlili Yamina
Steganography is a science of hiding messages into multimedia documents. A message can be hidden in a document only if the content of a document has high redundancy. Although the embedded message changes the characteristics and nature of the document, it is required that these changes are difficult to be identified by an unsuspecting user. On the other hand, steganalysis develops theories, methods and techniques that can be used to detect hidden messages in multimedia documents. The documents without any hidden messages are called cover documents and the documents with hidden messages are named stego documents. In past several years so many feature sets for steganalysis were proposed to detect stego images, these features based on different ideas and were considered to be effective for most steganography schemes. In this paper, a universal steganalysis scheme for JPEG images based upon hybrid transform features is presented. We first analyzed two different transform domains (Discrete Cosine Transform and contourlet transform (CT)). Then a combination of these two feature sets is constructed and employed for steganalysis. However a systematically comparison of these features have not been made in previous papers. In order to get a view of performance of current features in state of art, we designed several experiment to make a evaluation of them. Experiment result and conclusions draw from it were proposed in this paper.
Keywords: Steganography, feature, stego, steganalysis
The Journal of Computing 